Saturday, April 28, 2012

Fundamentals Of Computer Organization And Architecture






Mostafa Abd-El-Barr
King Fahd University of Petroleum & Minerals (KFUPM)
Hesham El-Rewini
Southern Methodist University

CONTENTS
Preface xi
1. Introduction to Computer Systems 1
1.1. Historical Background 2
1.2. Architectural Development and Styles 4
1.3. Technological Development 5
1.4. Performance Measures 6
1.5. Summary 11
Exercises 12
References and Further Reading 14
2. Instruction Set Architecture and Design 15
2.1. Memory Locations and Operations 15
2.2. Addressing Modes 18
2.3. Instruction Types 26
2.4. Programming Examples 31
2.5. Summary 33
Exercises 34
References and Further Reading 35
3. Assembly Language Programming 37
3.1. A Simple Machine 38
3.2. Instructions Mnemonics and Syntax 40
3.3. Assembler Directives and Commands 43
3.4. Assembly and Execution of Programs 44
3.5. Example: The X86 Family 47
3.6. Summary 55
Exercises 56
References and Further Reading 57
4. Computer Arithmetic 59
4.1. Number Systems 59
4.2. Integer Arithmetic 63
4.3 Floating-Point Arithmetic 74
4.4 Summary 79
Exercises 79
References and Further Reading 81
5. Processing Unit Design 83
5.1. CPU Basics 83
5.2. Register Set 85
5.3. Datapath 89
5.4. CPU Instruction Cycle 91
5.5. Control Unit 95
5.6. Summary 104
Exercises 104
References 106
6. Memory System Design I 107
6.1. Basic Concepts 107
6.2. Cache Memory 109
6.3. Summary 130
Exercises 131
References and Further Reading 133
7. Memory System Design II 135
7.1. Main Memory 135
7.2. Virtual Memory 142
7.3. Read-Only Memory 156
7.4. Summary 158
Exercises 158
References and Further Reading 160
8. Input–Output Design and Organization 161
8.1. Basic Concepts 162
8.2. Programmed I / O 164
8.3. Interrupt-Driven I / O 167
8.4. Direct Memory Access (DMA) 175
8.5. Buses 177
8.6. Input–Output Interfaces 181
8.7. Summary 182
Exercises 183
References and Further Reading 183
9 Pipelining Design Techniques 185
9.1. General Concepts 185
9.2. Instruction Pipeline 187
9.3. Example Pipeline Processors 201
9.4. Instruction-Level Parallelism 207
9.5. Arithmetic Pipeline 209
9.6. Summary 213
Exercises 213
References and Further Reading 215
10 Reduced Instruction Set Computers (RISCs) 215
10.1. RISC / CISC Evolution Cycle 217
10.2. RISCs Design Principles 218
10.3. Overlapped Register Windows 220
10.4. RISCs Versus CISCs 221
10.5. Pioneer (University) RISC Machines 223
10.6. Example of Advanced RISC Machines 227
10.7. Summary 232
Exercises 233
References and Further Reading 233
11 Introduction to Multiprocessors 235
11.1. Introduction 235
11.2. Classification of Computer Architectures 236
11.3. SIMD Schemes 244
11.4. MIMD Schemes 246
11.5. Interconnection Networks 252
11.6. Analysis and Performance Metrics 254
11.7. Summary 254
Exercises 255
References and Further Reading 256
Index 259

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